Not exactly, if SPI controller is supported by flashing tool e.g. flashrom
one can hot swap chips. It would work as follows:
- boot your platform to OS with functional BIOS storage
- while system booted remove BIOS storage
- place second chip (spare one) in socket
- flash development/debug version of coreboot/BIOS/UEFI
- reboot the platform and gather logs
- modify you coreboot/BIOS/UEFI code and repeat until you get working firmware
I will teach that technique in free OST2 training called Architecture 4032: coreboot Hands-On