# DC-ROMA RISC-V Mainboard III announced by DeepComputing **URL:** \ **Category:** Framework Laptop 13\ **Tags:** risc-v\ **Created:** [February 17, 2026, 9:12am UTC](https://community.frame.work/t/dc-roma-risc-v-mainboard-iii-announced-by-deepcomputing/80698 "2026-02-17T09:12:58Z")\ **Posts on this page:** 16\ **Page:** 1
**Author:** ![junaruga](https://sea1.discourse-cdn.com/flex001/user_avatar/community.frame.work/junaruga/32/5342_2.png) [@junaruga](https://community.frame.work/u/junaruga)\ **Post date:** [February 17, 2026, 9:12am UTC](https://community.frame.work/t/dc-roma-risc-v-mainboard-iii-announced-by-deepcomputing/80698/1 "2026-02-17T09:12:59Z")
The company announced their 3rd generation RISC-V mainboard. As I couldn’t find this topic, I created this thread. Feel free to discuss. 😉 News release: > **[DC-ROMA RISC-V Mainboard III Unveiled at FOSDEM: Powered by SpacemiT K3 for...](https://deepcomputing.io/dc-roma-risc-v-mainboard-iii-unveiled-at-fosdem-powered-by-spacemit-k3-for-framework-laptop-13/)** > > Today at FOSDEM, DeepComputing is excited to unveil the DC-ROMA RISC-V Mainboard III, our latest RISC-V mainboard for the Framework Laptop 13, powered by the recently released SpacemiT K3 RISC-V AI SoC — the world’s first RISC-V SoC to support the... Product page: > **[DC-ROMA RISC-V Mainboard III for Framework Laptop 13 — Early Access Pr](https://store.deepcomputing.io/products/dc-roma-risc-v-mainboard-iii-for-framework-laptop-13-early-access-program)** > > We’re launching an Early Access Program for developers and early adopters to receive the DC-ROMA RISC-V Mainboard III for Framework Laptop 13, powered by SpacemiT K3, the world’s first RISC-V AI SoC supporting the RVA23 profile. Program details:... Media articles: > **[DeepComputing Opens Pre-Orders for Its Third-Generation Framework Laptop 13...](https://www.hackster.io/news/deepcomputing-opens-pre-orders-for-its-third-generation-framework-laptop-13-risc-v-mainboard-2cd3285a967a)** > > RVA23 support means full compatibility with Canonical's Ubuntu 24.04 and future releases. > **[DeepComputing Unveils RVA23-Compliant Mainboard III for Linux on Framework 13](https://linuxgizmos.com/deepcomputing-unveils-rva23-compliant-mainboard-iii-for-linux-on-framework-13/)** > > DeepComputing has opened an Early Access Program for the DC-ROMA RISC-V Mainboard III. This hardware is a modular internal component designed to fit the Framework Laptop 13 chassis. It allows users to transition the modular laptop to a RISC-V... [https://liliputing.com/this-upcoming-mainboard-brings-a-spacemit-k3-risc-v-rva23-chip-to-the-framework-laptop/](https://liliputing.com/this-upcoming-mainboard-brings-a-spacemit-k3-risc-v-rva23-chip-to-the-framework-laptop/) ---
**Author:** ![Shiroudan](https://sea1.discourse-cdn.com/flex001/user_avatar/community.frame.work/shiroudan/32/15620_2.png) [@Shiroudan](https://community.frame.work/u/Shiroudan)\ **Post date:** [February 17, 2026, 7:36pm UTC](https://community.frame.work/t/dc-roma-risc-v-mainboard-iii-announced-by-deepcomputing/80698/2 "2026-02-17T19:36:52Z")
Cool! It’s very nice how fast DC Computing iterates. Feels like a lot of the RISC-V landscape is moving at a pace far faster than x86 Specsheet TL;DR: Main SoC: SpacemiT K3, 8-core CPU, up to 2.5GHz (Supports RV23 Vector set!!) AI Acceleration: 30 TOPS NPU Memory: 16GB / 32GB LPDDR5 (dual-chip) ---
**Author:** ![Shiroudan](https://sea1.discourse-cdn.com/flex001/user_avatar/community.frame.work/shiroudan/32/15620_2.png) [@Shiroudan](https://community.frame.work/u/Shiroudan)\ **Post date:** [February 17, 2026, 7:51pm UTC](https://community.frame.work/t/dc-roma-risc-v-mainboard-iii-announced-by-deepcomputing/80698/3 "2026-02-17T19:51:45Z")
For more information about the chip (including the GPU), a overview can be found here (note this is the variant with 2 core clusters, DC seems to be using 1): > **[Introduction%20to%20K3%20Series%20Chips.pdf](https://cdn.sipeed.com/public/k3/Introduction%20to%20K3%20Series%20Chips.pdf)** > > 863.00 KB Another TL;DR: X100 Cores (CPU) have SPECint2006 ~9/GHz (it runs at 2.5GHz). This isn’t all that amazing, other RISC-V processors (e.g. XiangShan have ~15/GHz of SPECint2006, SiFive P800 ~18/GHz but that’s also not common anywhere for purchase) For comparison, the cores in the DC ROMA II had an [advertised score](https://www.sifive.com/press/sifive-performance-p550-core-sets-new-standard-as-highest) of 8.65/GHz. That did however run at 2.0 GHz, thus maybe a ~30% speed increase is expected. It seems the main selling point of this generation is the RVV support (which is indeed very exciting). A100 Cores (AI accelerator) advertise support for 1024-bit RVV extension, and run at theoretically 30 TOPS (I would assume INT4?). ---
**Author:** ![Shiroudan](https://sea1.discourse-cdn.com/flex001/user_avatar/community.frame.work/shiroudan/32/15620_2.png) [@Shiroudan](https://community.frame.work/u/Shiroudan)\ **Post date:** [February 17, 2026, 8:03pm UTC](https://community.frame.work/t/dc-roma-risc-v-mainboard-iii-announced-by-deepcomputing/80698/4 "2026-02-17T20:03:11Z")
One last reply for this chain; If you’d like a more general idea of where this chip slots in, here is a [graph](https://tutorial.xiangshan.cc/hpca26/slides/Introduction.pdf) (SpecINT 2006 / GHz). Once again, advertised score of core in ROMA III is 9/GHz. ![image](https://us1.discourse-cdn.com/flex001/uploads/framework3/original/3X/a/e/ae1b4d2008de940c593afc7a305a4b7b8ccec048.png) ---
**Author:** ![Shiroudan](https://sea1.discourse-cdn.com/flex001/user_avatar/community.frame.work/shiroudan/32/15620_2.png) [@Shiroudan](https://community.frame.work/u/Shiroudan)\ **Post date:** [February 17, 2026, 8:18pm UTC](https://community.frame.work/t/dc-roma-risc-v-mainboard-iii-announced-by-deepcomputing/80698/5 "2026-02-17T20:18:24Z")
Sorry to add another message to the chain, @yuning_liang I am wondering what is barrier to using SODIMM memory connector instead of soldered memory. Especially this memory market this seem maybe more economical to allow people bring their own memory. Is it issue with the DDR PHY on the SOC? ---
**Author:** ![James3](https://avatars.discourse-cdn.com/v4/letter/j/b5e925/32.png) [@James3](https://community.frame.work/u/James3)\ **Post date:** [February 17, 2026, 9:06pm UTC](https://community.frame.work/t/dc-roma-risc-v-mainboard-iii-announced-by-deepcomputing/80698/6 "2026-02-17T21:06:06Z")
This is an amazing step up from the mainboard II board. One thing that would be really good would be usb 4 / thunderbolt 3 support, because then all the usb devices that work with the FW13 mainboard would also work with this one. With just usb 3.2, it is more similar to the FW12, usb wise. ---
**Author:** ![Shiroudan](https://sea1.discourse-cdn.com/flex001/user_avatar/community.frame.work/shiroudan/32/15620_2.png) [@Shiroudan](https://community.frame.work/u/Shiroudan)\ **Post date:** [February 18, 2026, 9:02pm UTC](https://community.frame.work/t/dc-roma-risc-v-mainboard-iii-announced-by-deepcomputing/80698/7 "2026-02-18T21:02:25Z")
[![](https://us1.discourse-cdn.com/flex001/uploads/framework3/original/3X/9/0/90241e1ae6bf8a8bbaadea4bdb2f552115e6f9ff.jpeg "SpacemiT K3 RISC-V llama.cpp Qwen3 30B Q4 Pre-Release Test") ](https://www.youtube.com/watch?v=3ziCQHnUqlE&t=7s) The NPU in this case really seems to just be another cluster of CPU cores (which are heavily optimized for INT Vector instructions). This seems much easier to program compared to the typical NPU which is nice. > ---
**Author:** ![Phobos](https://sea1.discourse-cdn.com/flex001/user_avatar/community.frame.work/phobos/32/45794_2.png) [@Phobos](https://community.frame.work/u/Phobos)\ **Post date:** [February 22, 2026, 10:01am UTC](https://community.frame.work/t/dc-roma-risc-v-mainboard-iii-announced-by-deepcomputing/80698/8 "2026-02-22T10:01:11Z")
Amazing to see! Why does DeepComputing use soldered ram for the boards by the way? Is there any specific reason? I’ve heard something about ARM boards usually being soldered as well on computers ---
**Author:** ![Brent\_Lewis](https://sea1.discourse-cdn.com/flex001/user_avatar/community.frame.work/brent_lewis/32/46520_2.png) [@Brent\_Lewis](https://community.frame.work/u/Brent_Lewis)\ **Post date:** [March 7, 2026, 2:47pm UTC](https://community.frame.work/t/dc-roma-risc-v-mainboard-iii-announced-by-deepcomputing/80698/9 "2026-03-07T14:47:26Z")
I’m ready to move away from x86. This would be my first choice… if not for the 13-inch framework chassis being unavailable right now. I hope it comes back, otherwise these mainboards will be a very hard sell. Not a great look for the collaboration, from the perspective of someone (me) looking to buy their first framework product. ---
**Author:** ![yuning\_liang](https://avatars.discourse-cdn.com/v4/letter/y/e79b87/32.png) [@yuning\_liang](https://community.frame.work/u/yuning_liang)\ **Post date:** [March 9, 2026, 11:25pm UTC](https://community.frame.work/t/dc-roma-risc-v-mainboard-iii-announced-by-deepcomputing/80698/10 "2026-03-09T23:25:23Z")
Can’t, no DDR support but LPDDR only ---
**Author:** ![yuning\_liang](https://avatars.discourse-cdn.com/v4/letter/y/e79b87/32.png) [@yuning\_liang](https://community.frame.work/u/yuning_liang)\ **Post date:** [March 9, 2026, 11:26pm UTC](https://community.frame.work/t/dc-roma-risc-v-mainboard-iii-announced-by-deepcomputing/80698/11 "2026-03-09T23:26:31Z")
Not bad. Add DeepComputing discord for the progress review ---
**Author:** ![yuning\_liang](https://avatars.discourse-cdn.com/v4/letter/y/e79b87/32.png) [@yuning\_liang](https://community.frame.work/u/yuning_liang)\ **Post date:** [March 9, 2026, 11:30pm UTC](https://community.frame.work/t/dc-roma-risc-v-mainboard-iii-announced-by-deepcomputing/80698/12 "2026-03-09T23:30:36Z")
Indeed. All LPDDR IP issues ---
**Author:** ![yuning\_liang](https://avatars.discourse-cdn.com/v4/letter/y/e79b87/32.png) [@yuning\_liang](https://community.frame.work/u/yuning_liang)\ **Post date:** [March 9, 2026, 11:31pm UTC](https://community.frame.work/t/dc-roma-risc-v-mainboard-iii-announced-by-deepcomputing/80698/13 "2026-03-09T23:31:02Z")
Thank you….. ---
**Author:** ![Shiroudan](https://sea1.discourse-cdn.com/flex001/user_avatar/community.frame.work/shiroudan/32/15620_2.png) [@Shiroudan](https://community.frame.work/u/Shiroudan)\ **Post date:** [March 10, 2026, 6:29am UTC](https://community.frame.work/t/dc-roma-risc-v-mainboard-iii-announced-by-deepcomputing/80698/14 "2026-03-10T06:29:10Z")
It should be possible (at least based on past [mainboards](https://store.deepcomputing.io/products/dc-roma-ai-pc-risc-v-mainboard-ii-for-framework-laptop-13?variant=50950609895588)) to get it with the Framework shell directly from DeepComputing. Does seem like Framework has a issue with keeping items in stock though 😅 ---
**Author:** ![yuning\_liang](https://avatars.discourse-cdn.com/v4/letter/y/e79b87/32.png) [@yuning\_liang](https://community.frame.work/u/yuning_liang)\ **Post date:** [March 10, 2026, 6:07pm UTC](https://community.frame.work/t/dc-roma-risc-v-mainboard-iii-announced-by-deepcomputing/80698/15 "2026-03-10T18:07:26Z")
Early Access Fans can go through us including the shell/cooler Master, mass volume via Framework Market place. Please check our website ---
**Author:** ![system](https://us1.discourse-cdn.com/flex001/uploads/framework3/original/1X/64c81a89f963ddb07633887baceb642a4b056046.png) [@system](https://community.frame.work/u/system)\ **Post date:** [September 6, 2026, 6:07pm UTC](https://community.frame.work/t/dc-roma-risc-v-mainboard-iii-announced-by-deepcomputing/80698/16 "2026-09-06T18:07:51Z")
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