What about if one also takes into account this:
Summary:
The EC might fail to send the PMF SPL, sPPT, fPPT, p3T, ao_sppt settings to the APU/CPU.
In your analysis, are you able to read the current PMF settings from the APU/CPU side?
e.g. ryzenadj
On BIOS 4.0.4
The EC console setting of SPL, sPPT, fPPT do not actually match the ryzenadj output.
sPPT, fPPT match, but the ryzenadj view of STAPM LIMIT is about 5000mW above the EC PMF SPL one.
I don’t know what is adjusting the SPL up above what the EC console outputs.
In BIOS 3.0.5, STAPM from ryzenadj matches the EC SPL console output.