Thanks so much. Just started doing symbol&footprint myself when I saw this thread.
I just finished a very basic first implementation of an Oculink x4 port. I switched to KiCad for this job, first time using it. I’m not usually the one designing the PCBs but wanted to give it a try.
Routing PCI-E lanes is definitely not easy, had some trouble with impedance. Ended up using the JLC04121H-3313 stack from jlcpcb for controlled impedance, but KiCads internal calculator wanted thicker traces so I deviated a bit.
Also not entirely sure I got the pinout right, the RX lanes on the Motherboard (so the TX lanes on the daughterboard) are should be daughterboard->motherboard, so I connected them to the RX lines of the Oculink connector - correct?
CORRECTION much later: Input in the github interface pinout table means input to the daughterboard. So TX are actually motherboard → daughterboard. So TX interface pins should be connected to TX Oculink pins
Unfortunately a full-sized Oculink 8i faces a few difficulties, first the spec is not public, second even more high speed lanes will be difficult for me, an inexperienced router, to do.
One thing I do hope I can add in the future is a DP in port to switch output to the internal display. Will have to research what needs to be done so it does actually switch (or if a purely passive solution might work again).
Finally, I am not quite sure why the internal PCB outline has an uneven back edge, all photos from the shell imply the back can be fully used, but both the SSD and the base reference PCB on the github have a retreating edge. @nrp sorry for the ping but can you confirm the board can be expanded like this?
(Yes there’s still quite a bit to do before it is ready, right now the signal integrity is probably very bad.)