Question. What limits the expansion bay to PCIe x8?


I’m curious to know what limits the expansion bay to PCIe x8. Are there any plans for future motherboards to offer PCIe x16 on the bay? I’m asking because I’m looking to make a custom mini pc or all in one system using a Framework motherboard. I want to know just what can be done with the expansion bay connector. Bay size limitations of the laptop are not relevant in my project as I’m not using the laptop shell. Only the power and data limitations matter and it’s mainly the data as I can power the expansion cards via other means than just the connector.

The expansion bay has two connectors each with 74-pins. One connector is used exclusively for power (and fan signals) while the other is used for data.

For each PCIe lane it needs 6 pins (2 ground, 2 transmit, and 2 receive) in order to ensure signaling integrity. In addition it needs another 8 pins for other PCIe related signaling (such as clock signals). That’s 56 pins out of the 74 total. (The other 18 are used mainly for display and USB signals)

I doubt they could increase the number of lanes to 16, however I also doubt it is necessary.

8 lanes of PCIe 4.0 is 128 Gbps of bandwidth, which is already a lot of bandwidth for most tasks (and it could potentially support PCIe 5.0 in the future).

Also, the CPU only has 20 PCIe lanes. Of those 20 lanes, 8 are used for SSDs (dual slots) and 1 is used for WiFi. That leaves only 11 lanes leftover, so Framework uses 8 to the bay (leaving 3 unused).

The closest to future plans that Framework has indicated for the expansion bay connector are the potential for higher generations that PCIe 4.0:

Adding PCIe 5.0 would double the bandwidth to 256 Gbps, which is just as fast as x16 PCIe 4.0.