I don’t think you’re completely wrong since it would be genuinely difficult for Intel or AMD to do a truly clean slate design. Support for legacy is also one of x86s biggest strengths while being a weakness.
Emulation is a big piece of the switch to ARM and while a lot has gotten very good, it’s probably never going to be 100%, and there will probably always be corner cases that just doesn’t work.
For a lot of people that won’t matter since they’re basically living in the browser with web apps - whatever soc gives the best battery life, regardless of isa is the choice.
I do a lot of cross-platform development (x86_64 and aarch64 mostly) and was pleasantly surprised by how much of my tooling is already built for both architectures. Everything I use day-to-day for both work work any hobby work runs natively on both.
The only things I’ve gotta emulate still are games All my favorite games are x86-only.
Games are probably what will keep me tied to x86 for the foreseeable future, especially older games. I’ve switched to Linux full time, so I’m already running everything through a compatibility layer which has gotten really good and works like 95% of the time, but I don’t want to stack emulation on top of that if I can avoid it.
Hello, big fan of the modular concept here, as a bit of a hardware nut. I’m curious as to whether there are plans to expand Framework’s lineup into tower, mobile, and other form factors, as well as whether ARM support is in the works or not. After all, there’s been discussion about open-source hardware standards for some time now, and it’s picked up again after Apple’s SoC adoption in recent years.
So far as I know, Framework hasn’t shared any details on their plans for future products. That said, I’d be VERY surprised if they weren’t contemplating an ARM motherboard in the near future.
As for other form factors, we’ll have to see what they come up with. If I understand their philosophy correctly, they’re looking for areas where people want more openness, but manufacturers aren’t providing it. Desktop computers are already very open, and are pretty much commodity items these days, so I’d be surprised if they went in that direction, but it could be possible.
To bake this up with some numbers from amd’s phoenix chip: the front-end+μcode part (which should be only/most part of a cpu that is ISA dependent) of a zen4 core is 0.98mm², time 8 cores is less then 8mm², meanwhile the whole chip is 178mm² large. That means only slightly more then 4% of chip silicon is related to these parts of the cpu cores. All 8 CPU zen4 cores themself are only less then 18% of the chip silicon. And even with ARM you need silicon space for the front-end and microcode. Sources are the table “Core area breakdown” from this semianalysis article and this slide from AMD.
(EDIT: I’ve realized that the numbers in the article from semianalysis are probably related to server processor manifactured with TSMC N5 node meanwhile phoenix chips are made with N4. So the zen4 cores inside phoenix might be even smaller than what I wrote above)
In many applications complex instruction sets have an advantage: less front-end work and less registry operations compared to doing the same thing with multiple instructions. Even ARM and RISCV are not pure risc ISAs anymore because of vector extensions for example. Just think of original amd64 ISA vs modern amd/intel cores with vector extensions: avx512/avx2/ecc… made the ISA larger but performance improved in some applications.
Computer Scientist designed an 64 RISC-V RV64IM processor here, I would say we can summarize these two archs with “CISC is compiler friendly, RISC is processor friendly”
Intel’s x86 has thousands of instructions and they must be executable by logic gates and stuff. RISC architectures like RISC-V and ARM have very low amount of instructions and they are really really simple instructions. So you can place a whole processor in a very small die area and very efficient electrical properties. That’s why ARM or RISC-V is more efficient than x86.
Also very basic instructions doing very basic things making pipelining easier and efficient too. I’m confident we can see RISC domination in future because we have amazing compilers right now.
I don’t think there was so much problems with compiling for RISC. Certainly harder to write assembly because the programmer would have to daisy-chain several RISC instructions to produce what may be a single instruction on CISC. Did you mean VLIW?
This is a good summary of the thinking behind Very Long Instruction Word philosophy that was big a couple of decades ago. Unfortunately for real-life implementations - notably Intel IA-64 marketed as Itanium - compilers of the day were not so amazing after all.
The Russians claim to have cracked VLIW with their Elbrus designs, so maybe VLIW will make a comeback?
This feels to me like a statement from a computer science history class. How much of it is still relevant today? Here the author argues that not much is.
But… isn’t most “pipelining” work done with micro-ops after the decode/precode of instructions? Does the ISA actually matter for what is done before decode (branch prediction)?
Unrelated note: I realized that all article linked in my previous posts analyzed “big” cores (in my first post amd zen4 vs arm cortex x2). Neither x86 companies have tried a real little core given that even intel E-core are bigger then common arm little core (1)(2).
Given that the Snapdragon X Elite chips are currently being demo’ed at Computex with amazing claimed battery life, I’d love to see a mainboard for these chips. Linux already supports ARM64 and Windows looks like it supports it now as well.
Honestly, my 7640HS is lacking in battery life (5-6h in VSCode doing web dev stuff) and potentially doubling / tripling that would be amazing.
Promising start. For people who prefer to use a decent operating system, not the boomer generation ones highlighted, they might have a breif wait. 9Front and Genode (both of which work on other ARM systems and at least one also works out-the-box on current Framework) are nonetheless likely to follow shortly afterwards.
Sadly Haiku seems to have missed this boat, betting all their (non-x86) chips on RISC-V instead.
German laptop maker Tuxedo, just announced that they will be launching around Christmas 2024 (exact date isn’t final yet) a new laptop rocking the long awaited ARM based Snapdragon X Elite SoC from Qualcomm; which is fantastic news (specially for us Linux users). Talking about Linux support, that still a work in progress but seems to be tracking well and should be mostly completed by end of year (fingers crossed!).
My question to Framework is, will there be a Snapdragon X Elite option for the framework laptops? If so, what sort of timeline should we be looking for roughly?
Not to bash on Tuxedo, but considering that every laptop they sell is a reference design, I would imagine that Tuxedo’s ARM laptop will be getting released by a bunch of other brands.
I think it is great!
I will wait until Framework releases something like that. If they come out with one, I would be very interested in it, if the power efficiency is a significant improvement. Otherwise I don’t see much reason for it.
I see the article mentioned ddr5x, I wonder if it’s soldered or camm.
Great to see the linux world is eager to take advantage of the new platform. These things will be great for getting programming done over weekend trips when battery life normally kills me.
All my favorite games are x86-only.
