Introducing a new RISC-V Mainboard from DeepComputing

See my post over here for a possible way to do it.

Another thought I just had—around 5 years ago, m.2 SATA SSDs were pretty common. Why not add a SATA-only m.2 slot? Or is the issue that SATA still requires PCIe lane(s) due to SATA presumably not being natively integrated into the SOC directly?

NVMe and wifi are both just PCIe devices, and so the m.2 connector is simply being used as a smaller version of the bog-standard PCIe slot you find on desktop motherboards or the like (even more-so since I don’t believe any Framework mainboards support m.2 SATA SSDs).

There was already another user that repurposed their wifi slot on the x86 Framework 13 mainboard for their SSD in order to use the main NVMe slot for an external GPU and it all “just worked”… at least on Linux:

Sata does require sata, some socs do provide that directly or you can convert pcie or usb or something into it.

You can easily, you just need an adabter that wires the 1 pcie lane for the wifi to the e-key pinout. You can do that pretty much anywhere pcie wifi cards are used (some devices use the same chipset with just the proprietary intel wifi protocol and no pcie).

Is the RISC-V chip on this Mainboard affected by this vulnerability? The article mentions a specific RISC-V based chip, but stops short of commenting on whether it affects all chips implementing this architecture or not…

Haven’t looked at that article, but have a read of this one. which explains the problem quite clearly. It only affects a chinese sourced chip family.

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Wow,
this is a very interesting step, particularly with the way that power demands are growing.

I’d love to see a framework laptop with one of these RISC units:https://www.fujitsu.com/global/imagesgig5/FUJITSU-MONAKA.pdf

pcie6, CXL3, high bandwidth and performant memory with reduced power draw and optimised IO.

Looking forward to seeing you guys deliver :slight_smile: