So framework says they’re making semi custom sticks through ADATA. ADATA’s website shows they only make the middle tier sodimm, so unless frameworks customisation isn’t just a whitelabelling, buying ram elsewhere is cheaper and actually higher performance.
I’m not talking about xmp or anything. All framework has said is the laptop uses JEDEC timings. But JEDEC timings have three factory speed bins, class A, B, and C.
For DDR5 the timings are 40-40-40/46-46-46/50-50-50 respectively.
I’d like to support framework as I know they make better margins on these types of parts but there’s really no reason they can’t use class A timings since they’ve specified using Hynix chips which are the best on the market.
I stumbled upon this thread and just wanted to share here (for posterity and for anyone else googling) that, yes, that Micron documentation cited above is correct – there are four bins in DDR5: AN, B, BN, C. (Source: JESD400-5B aka “DDR5 Serial Presence Detect (SPD) Contents”, which is available for free after registration, unlike the main spec.)
I suspect that the AnandTech article that people often refer to was based on an old draft of the standard, where they still had only three bins.