Some thoughts (some of which mentioned already by others):
Most of the numbers shown here are for bits on the wire. However, that does not represent the amount of actual data being sent. For example, SATA, PCIe 2.0, USB 3.0, HDMI, and DisplayPort 1.4 transmit 10 bits on the wire for every 8 bits of data, otherwise known as 8b/10b encoding. This means USB 3.0 is more like 4 Gbps instead of 5 Gbps.
Higher speed modes use a more efficient encoding. Below is a list with numbers for single lane/single direction speed:
- PCIe 3.0 8 Gbps using 128b/130b = 7.877 Gbps
- PCIe 6.0 64 Gbps using 242b/256b = 60.5 Gbps
- USB 3.1 gen 2 10 Gbps using 128b/132b = 9.846 Gbps
- USB4 10 Gbps uses 64b/66b = 9.697 Gbps
- USB4 20 Gbps uses 128b/132b = 19.39 Gbps
- Thunderbolt 10 Gbps and 20 Gbps uses 64b/66b but the numbers are after applying the encoding, so the actual bits on the wire is 10.3125 Gbps or 20.625 Gbps. This makes Thunderbolt slightly faster than USB4 (when USB4 is not doing Thunderbolt).
This means USB 3.1 gen 2 is faster then USB 3.2 gen 1x2 even though both have a total of 10 Gbps on the wire.
You are mixing up lane and line.
A lane is two lines, one for each direction.
- 4 wires
- 2 lines (1 line = 1 differential pair = 2 wires)
- 1 lane (a pair of lines, one for Rx and one for Tx)
USB-C has room for 4 lines (for DisplayPort) or 2 lanes (for USB 3.2 or Thunderbolt)
or 1 lane of USB 3.1 gen 2 and 2 lines of DisplayPort.
Search and replace lane with line:
“Adds two extra lines”, “the newly added lines”, “TX line”, “RX line”, “the 4 high-speed lines”, “single line speed”, “all 4 high-speed lines”, “10Gbps-per-line”.
Same lane/line confusion. DisplayPort lines are one direction so I wouldn’t call them a lane.
DP++: usually DP++ is limited to HDMI 1.4. Maybe there exist some DP++ ports that can do HDMI 2.0 - I guess it would just require a voltage shifter that can handle the 6 Gbps per line bandwidth.
MTS: Should be MST (Multi-Stream Transport). MST is interesting because an MST hub can convert DisplayPort signals of different link width and link rates like a PCIe switch can. Also, MST can use DSC on the input and decompress that on the output for displays that don’t support DSC. DSC allows connecting 3 4K 60Hz displays from a single HBR3 x4 link.
Same lane/line confusion. Thunderbolt uses 8 wires, 4 lines, 2 lanes. Link width can be one or two lanes.
Read the USB4 spec to understand how Thunderbolt works since they are very similar. Thunderbolt always sends a Thunderbolt signal (when a Thunderbolt device is connected). DisplayPort, PCIe, (and now USB with Thunderbolt 4) are encapsulated into Thunderbolt packets (they are said to be tunnelled). It’s like how Ethernet can do https and smb and telnet on the same wire.
Thunderbolt 1 and Thunderbolt 2 have the same bandwidth but Thunderbolt 2 can combine the 2 lanes (also called channels) into a single link (channel aggregation). In Thunderbolt 1, the two 10 Gbps lanes are separate. Thunderbolt 1 and Thunderbolt 2 can handle two 10 Gbps displays, but only Thunderbolt 2 can handle a 20 Gbps display. While Thunderbolt 1 can do two channels of DisplayPort (one per lane), I don’t know if it can do two DisplayPort signals on a single lane to allow the other lane to be dedicated to PCIe, or if there’s a way for Thunderbolt 1 to do more than one lane worth of PCIe. The channel aggregation of Thunderbolt 2 and later makes things easier and more efficient.
Thunderbolt 4 hubs can be used with Thunderbolt 3 hosts in macOS Big Sur and later because macOS uses its own Thunderbolt connection manager. Windows uses the connection manager that is built into the firmware of the host Thunderbolt controller (ICM - Internal Connection Manager). Linux has software connection manager but only for Macs?
USB in Thunderbolt 1 and 2 docks is done using tunnelled PCIe to USB controllers in the docks. The Thunderbolt 3 controller has its own USB controller. For Alpine Ridge, this is used for the Thunderbolt ports only. Titan Ridge has an extra USB port not connected to the Thunderbolt ports.
USB in Thunderbolt 4 docks (using Goshen Ridge) when connected to a Thunderbolt 4 host (such as an M1 Mac) is controlled by the USB controller of the host which uses USB tunnelling to a four port USB hub in the dock (3 downstream Thunderbolt ports and one USB port). I think the hub is part of Goshen Ridge. When connected to a Thunderbolt 3 host, PCIe tunnelling is used to communicate with a USB controller in the Goshen Ridge. In that case, the USB hub is still used, limiting upstream bandwidth to 10 Gbps. Intel could have done that differently to fully utilize the ≈23 Gbps PCIe bandwidth but i guess the hub method was easier?
USB4 and Thunderbolt 4 use different signalling bandwidth (as described earlier). USB4 hosts are not required to support Thunderbolt (but I think all current hosts do?). Thunderbolt supports a depth (chain length) of 6 but USB4 only supports a depth of 5.
Thunderbolt 3/4 cannot support two HBR3 x4 DisplayPort signals because that would require 51.84 Gbps. Usually you are limited to two HBR2 or one HBR3 with one HBR (34.56 Gbps total). For the XDR display when connected to a GPU that doesn’t support DSC, Apple has a trick to force two HBR3 links (using their software Thunderbolt connection manager). The trick works because the XDR only requires 19.5 Gbps per connection (38.93 Gbps total) and Thunderbolt doesn’t transmit the stuffing symbols used to fill the HBR3 bandwidth (25.92 Gbps).
The DisplayPort Alt Mode support of TB3 and TB4 ports also includes USB support so you can connect USB-C docks or USB devices.
Same lane/line confusion. 8 wires, 4 lines. I wouldn’t use lanes in this description since not all the alt modes supported by USB-C are bi-directional.
I don’t think DisplayPort 2.0 Alt Mode is used or supported by anything yet? So it’s not a requirement of USB4 or Thunderbolt 4.
For the DisplayPort requirement of Thunderbolt 4, it just means that the Thunderbolt 4 host controller has two DisplayPort 1.4 HBR3x4 inputs from a GPU. 8K60 is not possible uncompressed (unless you count 4:2:0 8bpc using a non-HDMI timing).
Regarding DisplayPort tunnelling, Apple’s Thunderbolt Target Display Mode used in old Thunderbolt iMacs appears to use a cross domain path for DisplayPort tunnelling. A domain consists of a Thunderbolt host and it’s connected Thunderbolt devices. You can connect two domains together so that the hosts can communicate with each other (Thunderbolt IP in Windows, macOS, Linux; Thunderbolt Target Disk Mode between macOS and a Mac’s EFI; Thunderbolt Target Display Mode between macOS and macOS). It would be interesting for Linux to support a software Thunderbolt connection manager that can support cross-domain DisplayPort tunnelling. It could be used as a Thunderbolt KVM.
You can connect many MST hubs to all 4 Thunderbolt ports in chains and trees, so you can have like a 100 DisplayPort ports, but the iGPU can only support 4 displays.
Each Thunderbolt port can only have two DisplayPort signals which means each Thunderbolt port can have two trees of MST hubs but the iGPU only has 4 DisplayPort signals to devide among all the 8 possible routes (9 including the built-in Display).
On the other hand, the Apple M1 Max has 8 DisplayPort signals to devide between 8 routes (3 Thunderbolt 4 ports, one HDMI port, and the built-in display). However, three of those signals can only be used when connecting a tiled display like the LG UltraFine 5K or the Dell UP2715K - it’s an interesting way of handling tiled displays - like an extra abstraction layer that didn’t exist in Intel Macs.