During research about CPU chipsets I found out that the Ryzen AI Max line-up only has 3 native USB 3.2 (Gen2) ports, yet the Desktop has 4, not including the additional 20 pin header for two additional ports. Does FW just split the USBs between the ports (or like a hub) or does the desktop use some kind of PCIe to USB adapter internally?
I’ve been wondering about these things a lot lately, especially since some manufacturers say things that do not seem to line up with AMD/Intel specs (and sometimes, as with PCIe 5.0 SSDs, they are actually misleading).
You could take a look at the mainboard schematics, the answer might be in there.
Thanks, good sir!
I just took a quick look at the first diagram, and it’s complicated (I had to delete the original comment because I missed a detail).
So the back USBs seem to be connected via one USB 3.2, 2.0, and PCIe 3.0 line (which is dumb because Strix Halo doesn’t have dedicated 3.0, so one Gen4 lane is sacrificed).
The front connectors seem to be connected to two type-E hanging on a hub that is connected via another line of 3.2 and 2.0.
Wrong*:
There doesn’t seem to be any mention of the additional USB ports (of which there should be 4 via 2 connectors).
In addition to this, both USB4 ports seem to require an additional USB 2.0 lane each (at least it doesn’t look like a shared connection).
Total: Two USB 3.2 and 4 USB 2.0 are used (one USB is downgraded).
*after consulting the diagram, my brain and the technical details page for one last time, I figured out what my problem was: Those connectors are easy to find, because they are the same as those for the front USB (type-E) - they are the literal front connectors. That’s the problem solved. “Easy”.
Now everything lines up again, and theoretically I could have understood that without the diagram.
The PCIe 3.0 line is connected to the controller for the 5 Gbps Ethernet port. PCIe 3.0 is capable of 8 Gbps (minus some error correction and overhead) so there would be no point using 4.0 for a 5 Gbps Ethernet port (I doubt the Ethernet controller chip supports above 3.0).
PCIe 4.0 would only serve a purpose if 10 Gbps Ethernet were being used, which Framework evidently decided against (I assume they felt it wasn’t worth whatever the cost increase would’ve been).
Each USB 3.2 or USB4 port also needs a 2.0 connection (as 2.0 uses physically separate wires and signaling). When AMD’s specs say it supports 2 USB4 ports, 3 USB 3.2 ports, and 3 USB 2.0 ports they mean that those three USB 2.0 are in addition to the 5 that go with the USB4 and USB 3.2 ports. So the CPU technically has 8 USB 2.0 lines.
Yes. That is correct, but since there is only PCIe 4.0 the only reason to actually downgrade to 3.0 would be to make the board very minimally cheaper, as the traces don’t need quite the same signal integrity/quality, as far as I am aware.
This is a very good point, I just had to google that (wikipedia) and it seems to be true, for what the wiki knows. Seems as if there could actually be more FW could have done with this chip (three extra 2.0s because why not /j).
Now a new “problem” arises. The WiFi + BT card requires USB 2.0 too, the question is: Whose USB 2.0? An integrated one or a dedicated one for this time?
If the Ethernet chip is physically incapable of PCIe 4.0 (after all why would it be, the speed bottleneck is the 5 Gbps Ethernet) then that’s probably the reason it’s 3.0.
Or because of bad timing, the new realtek 10gbit chipset that would be a drop in replacement for their current 5gbit once is just starting to become available in volume.
(three extra 2.0s because why not /j).